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TDA7575PD
MULTIFUNCTION DUAL BRIDGE POWER AMPLIFIER WITH INTEGRATED DIGITAL DIAGNOSTICS

DMOS POWER OUTPUT NON-SWITCHING HI-EFFICIENCY SINGLE-CHANNEL 1 DRIVING CAPABILITY HIGH OUTPUT POWER CAPABILITY 2x28W/ 4 @ 14.4V, 1KHZ, 10% THD, 2x40W/4 EIAJ MAX. OUTPUT POWER 2x75W/2, 1x150W/1 SINGLE-CHANNEL 1 DRIVING CAPABILITY - 84W UNDISTORTED POWER - FULL I2C BUS DRIVING WITH 4 ADDRESS POSSIBILITIES: - ST-BY, PLAY/MUTE, GAIN 12/26dB, FULL DIGITAL DIAGNOSTIC POSSIBILITY TO DISABLE THE I2C DIFFERENTAL INPUTS FULL FAULT PROTECTION DC OFFSET DETECTION TWO INDEPENDENT SHORT CIRCUIT PROTECTIONS CLIPPING DETECTOR PIN WITH SELECTABLE THRESHOLD (2%/10%) ST-BY/MUTE PINS
MULTIPOWER BCD TECHNOLOGY MOSFET OUTPUT POWER STAGE
PowerSO36 (Slug up) ORDERING NUMBER: TDA7575PD
has a very low distortion allowing a clear powerful sound. Among the features, its superior efficiency performance coming from the internal exclusive structure, makes it the most suitable device to simplify the thermal management in high power sets.The dissipated output power under average listening condition is in fact reduced up to 50% when compared to the level provided by conventional class AB solutions. This device is equipped with a full diagnostic array that communicates the status of each speaker through the I2C bus. The TDA7575PD has also the possibility of driving loads down to 1 paralleling the outputs into a single channel. It is also possible to disable the I2C and control the TDA7575PD by means of the usual ST-BY and MUTE pins.
VS
DESCRIPTION The TDA7575PD is a new BCD technology DUAL BRIDGE type of car radio amplifier in PowerSO36 package specially intended for car radio applications. Thanks to the DMOS output stage the TDA7575PD BLOCK DIAGRAM
ADDRESS A B CLK DATA VCC
CD_OUT
I2CBUS IN1+
CLIP DETECTOR
OUT1+ IN1OUT1SHORT CIRCUIT PROTECTION IN2+ OUT2+
IN2SHORT CIRCUIT PROTECTION
OUT2-
I2C EN
SVR
ST-BY/HE
S_GND
PW_GND
TAB
1
MUTE
D01AU1269
March 2004
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TDA7575PD
PIN CONNECTION (Top view)
OUT1+ OUT1+ VCC VCC B PWGND PWGND OUT1OUT1OUT2OUT2PWGND PWGND A VCC VCC OUT2+ OUT2+
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
D01AU1270
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
TAB IN1+ IN1MUTE ST_BY SGND DATA CK N.C. N.C. N.C. N.C. SVR CD-OUT 1-OHM I2C-EN IN2IN2+
ABSOLUTE MAXIMUM RATINGS
Symbol Vop VS Vpeak VCK VDATA IO IO Ptot Tstg, Tj Operating Supply Voltage DC Supply Voltage Peak Supply Voltage (for t = 50ms) CK pin Voltage Data Pin Voltage Output Peak Current (not repetitive t = 100ms) Output Peak Current (repetitive f > 10Hz) Power Dissipation Tcase = 70C Storage and Junction Temperature Parameter Value 18 28 50 6 6 8 6 86 -55 to 150 Unit V V V V V A A W C
THERMAL DATA
Symbol Rth j-case Parameter Thermal Resistance Junction-case Max Value 1 Unit C/W
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TDA7575PD
ELECTRICAL CHARACTERISTCS: (VS=14.4V; f=1KHz; RL=4; Tamb= 25C unless otherwise specified)
Symbol POWER AMPLIFIER VS Id Po Supply Voltage Range Total Quiescent Drain Current Output Power EIAJ (VS = 13.7V) THD = 10% THD = 1%; BTL MODE RL = 2; EIAJ (VS = 13.7V) RL = 2; THD 10% RL = 2; THD 1% RL = 2; MAX POWER Single channel configuration (1 pin >2.5V); RL = 1; EIAJ (VS = 13.7V) THD 3% MAX POWER THD Total Harmonic Distortion PO = 1-12W; STD MODE HE MODE; PO = 1-2W HE MODE; PO = 4-8W PO = 1-12W, f = 10kHz RL = 2; HE MODE; Po = 3W Single channel configuration (1 pin >2.5V); RL = 1; PO = 4-30W CT RIN GV1 GV1 GV2 GV2 EIN1 EIN2 SVR BW ASB ISB AM VOS VAM CMRR Cross Talk Input Impedance Voltage Gain 1 (default) Voltage Gain Match 1 Voltage Gain 2 Voltage Gain Match 2 Output Noise Voltage Gain 1 Output Noise Voltage Gain 2 Supply Voltage Rejection Power Bandwidth Stand-by Attenuation Stand-by Current Consumption Mute Attenuation Offset Voltage Min. Supply Mute Threshold Input CMRR VCM = 1Vpk-pk; Rg = 0 Mute & Play 80 -45 7 50 Rg = 600; Gv = 26dB filter 20 to 22kHz Rg = 600; Gv = 12dB filter 20 to 22kHz f = 100Hz to 10kHz; Vr = 1Vpk; Rg = 600 (-3dB) 50 100 90 100 2 90 0 7.5 60 45 8 20 Rg = 600; PO = 1W 60 60 25 -1 11 -1 8 50 35 25 60 45 70 130 40 28 22 65 50 37 75 18 200 V mA W W W W W W W Parameter Test Condition Min. Typ. Max. Unit
125 80 140
130 84 150 0.03 0.03 0.5 0.15 0.03 0.02 75 100 26 0 12 0 40 15 60 130 27 1 13 1 60 25 0.1 0.1 0.5 0.5 0.1
W W W % % % % % % dB K dB dB dB dB V V dB KHz dB A dB mV V dB
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TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
Symbol VMC SR VPM VTO TON TOFF VOFF VSB VHE IO Parameter Maximum common mode input level Slew Rate Mute/Unmute Transient Mute/Stand-by Transient Turn on Delay Turn off Delay St-By pin for St-By St-By pin for standard bridge St-By pin for Hi-eff St-By pin Current St-By Pin Current Vm Vm Im Im VI2C VI2C I2C I2C V1OHM V1OHM I1OHM I1OHM La Ha Ia Ia Lb Hb Ib Ib TW TPI ICDH B Pin Current (ST-BY) B Pin Current (Operative) Thermal warning Thermal Protection intervention Clip Pin High Leakage Current CD off, 0V < VCD < 5.5V -15 A Pin Current (ST-BY) A Pin Current (Operative) B Pin Voltage Mute pin voltage for mute mode Mute pin voltage for play mode Mute pin current (ST_BY) Mute pin current (operative) I2C pin voltage for I2C disabled I2C pin voltage for I2C enabled I2C pin current (stby) I2C pin current (operative) 1OHM pin voltage for 2ch mode 1OHM pin voltage for 1ohm mode 1OHM pin current (stby) 1OHM pin current (operative) A Pin Voltage 0V < 1OHM <18V, Vstby < 1.5V 1OHM <18V, Vstby > 3.5V Low logic level High logic level 0V < A < 18V, Vstby < 1.5V A<18V, Vstby > 3.5V Low logic level High logic level 0V < B < 18V, Vstby < 1.5V B < 18V, Vstby > 3.5V 0V < I2C EN < 18V, Vstby < 1.5V I2C EN <18V, Vstby>3.5V Vmute = 0V, Vstby < 1.5V 0V < Vmute < 18V, Vstby > 3.5V 0 2.5 -5 7 0 2.5 -5 7 0 2.5 -5 7 0 2.5 -5 7 0 11 150 170 0 15 0 11 0 11 0 11 1.5 < Vstby/HE < 18V Vstby < 1.5V A-weighted A-weighted D2 (IB1) 0 to 1 D2 (IB1) 1 to 0 0 3.5 7 7 -10 0 3.5 -5 0 65 160 0 f = 1kHz 1.5 -100 -100 4 0 0 15 15 100 100 40 40 1.5 5 18 200 10 1.5 18 5 100 1.5 18 5 15 1.5 18 5 15 1.5 18 5 15 1.5 18 5 15 Test Condition Min. Typ. Max. 1 Unit Vrms V/s mVpp mVpp ms ms V V V A A V V A A V V A A V V A A V V A A V V A A C C A
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ELECTRICAL CHARACTERISTCS: (continued)
Symbol ICDL CD Parameter Clip Pin Low Sink Current Clip detect THD level Test Condition CD on; VCD < 300mV D0 (IB1) = 0 D0 (IB1) = 1 Min. 1 0.8 5 1.3 10 2.5 15 Typ. Max. Unit mA % %
(*) ST-BY Pin high enables I2C bus; ST-BY Pin low puts the device in ST-BY condition.(see "prog" for more details) TURN ON DIAGNOSTICS (Power Amplifier Mode) Pgnd Short to GND det. (below this limit, the Output is considered in Short Circuit to GND) Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS) Normal operation thresholds.(Within these limits, the Output is considered without faults). Shorted Load det. Open Load det. Normal Load det. 130 1.5 70 Power Amplifier in st-by condition 1.2 V
Pvs
Vs -0.9
V
Pnop
1.8
Vs -1.5
V
Lsc Lop Lnop
0.5

TURN ON DIAGNOSTICS (Line Driver Mode) Pgnd Short to GND det. (below this limit, the Output is considered in Short Circuit to GND) Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS) Normal operation thresholds.(Within these limits, the Output is considered without faults). Shorted Load det. Open Load det. Normal Load det. 400 4.5 200 Power Amplifier in st-by 1.2 V
Pvs
Vs -0.9
V
Pnop
1.8
Vs -1.5
V
Lsc Lop Lnop
1.5

PERMANENT DIAGNOSTICS (Power Amplifier Mode or Line Driver Mode) Pgnd Short to GND det. (below this limit, the Output is considered in Short Circuit to GND) Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS) Normal operation thresholds.(Within these limits, the Output is considered without faults). Shorted Load det. Pow. Amp. mode Line Driver mode Power Amplifier in Mute or Play condition, one or more short circuits protection activated Vs - 0.9 1.2 V
Pvs
V
Pnop
1.8
Vs -1.5
V
Lsc
0.5 1.5

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ELECTRICAL CHARACTERISTCS: (continued)
Symbol VO Parameter Offset Detection Test Condition Power Amplifier in play condition AC Input signals = 0 Min. 1.5 Typ. 2 Max. 2.5 Unit V
I2C BUS INTERFACE fSCL VIL VIH Clock Frequency Input Low Voltage Input High Voltage 2.3 400 1.5 KHz V V
I2C BUS INTERFACE Data transmission from microprocessor to the TDA7575PD and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown by fig. 1, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. Byte Format Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. Acknowledge The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDAline is stable LOW during this clock pulse. * Transmitter = master (P) when it writes an address to the TDA7575PD = slave (TDA7575PD) when the P reads a data byte from TDA7575PD ** Receiver = slave (TDA7575PD) when the P writes an address to the TDA7575PD = master (P) when it reads a data byte from TDA7575PD
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TDA7575PD
Figure 1. Data Validity on the I2CBUS
SDA
SCL DATA LINE STABLE, DATA VALID CHANGE DATA ALLOWED
D99AU1031
Figure 2. Timing Diagramon the I2CBUS
SCL I2CBUS SDA
D99AU1032
START
STOP
Figure 3.
SCL
1
2
3
7
8
9
SDA MSB START
D99AU1033
ACKNOWLEDGMENT FROM RECEIVER
1 Ohm Capability Setting It is possible to drive 1OHM load paralleling the outputs into a single channel. In order to implement this feature, outputs are to be connected on the board as follows: OUT1+ (PIN35 and PIN36) shorted to OUT2+ (PIN19 and PIN20) OUT1- (PIN28 and PIN29) shorted to OUT2- (PIN26 and PIN27).
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It is recommended to minimize the impedance on the board between OUT2 and the load in order to minimize THD distortion. It is also recommended to control the maximum mismatch impedance between VCC pins (PIN21/PIN22 respect to PIN33/PIN34) and between PWGND pins (PIN24/PIN25 respect to PIN30/PIN31), mismatch that must not exceed a value of 20 mOhm. With 1OHM feature settled the active input is IN2 (PIN17 and PIN18), therefore IN1 pins should be let floating. It is possible to set the load capability acting on 1OHM pin as follows: 1OHM PIN (PIN15) < 1.5V: two channels mode (for a minimum load of 2 OHM) 1OHM PIN (PIN15) > 2.5V: one channel mode (for 1 OHM load). IT IS TO REMEMBER THAT 1 0HM FUNCTION IS A HARDWARE SELECTION. Therefore it is recommended to leave 1OHM PIN floating or shorted to GND to set the two channels mode configuration, or to short 1OHM PIN to VCC to set the one channel (1OHM) configuration. I2C Abilitation Setting It is possible to disable the I2C interface by acting on I2C PIN (PIN16) and control the TDA7575PD by means of the usual ST-BY and MUTE pins. In order to activate or deactivate this feature, I2C PIN must be set as follows: I2C PIN (PIN16) < 1.5V: I2C bus interface deactivated I2C PIN (PIN16) > 2.5V: I2C bus interface activated It is also possible to let I2C PIN floating to deactivate the I2C bus interface, or to short I2C PIN to VCC to activate it. In particular: I2C ENABLED: I2C pin (PIN16) > 2.5V - STD MODE: Vstby (PIN5) > 3.5V, IB2(D1)=0 - HE MODE: Vstby (PIN5) > 3.5V, IB2(D1)=1 - PLAY MODE: Vmute (pin 4) >3.5V, IB1 (D2) = 1 The amplifier can always be switched off by putting Vstby to 0V, but with I2C enabled it can be turn on only through I2C (with Vstby>3.5V). I2C DISABLED: I2C pin (PIN16) < 1.5V - STD MODE: 3.5V < stby (PIN5) < 5 - HE MODE: Vstby (PIN5) > 7V - PLAY MODE: Vmute (pin 4) >3.5V For both STD and HE MODE the play/mute mode can be set acting on Vmute pin.
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TDA7575PD
SOFTWARE SPECIFICATIONS All the functions of the TDA7575PD are activated by I2C interface. The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from P to TDA7575PD) or read instruction (from TDA7575PD to P). ADDRESS SELECTION
A6 A5 A4 A3 A2 A1 A0 R/W 1 1 0 1 0 B A X
If R/W = 0, the P sends 2 "Instruction Bytes": IB1 and IB2. IB1
D7 D6 D5 D4 D3 D2 D1 D0 X Diagnostic enable (D6 = 1) Diagnostic defeat (D6 = 0) Offset Detection enable (D5 = 1) Offset Detection defeat (D5 = 0) Gain = 26dB (D4 = 0) Gain = 12dB (D4 = 1) X Mute (D2 = 0) Unmute (D2 = 1) X CD 2% (D0 = 0) CD 10% (D0 = 1)
IB2
D7 D6 D5 D4 D3 D2 D1 D0 X used for testing used for testing Stand-by on - Amplifier not working - (D4 = 0) Stand-by off - Amplifier working - (D4 = 1) Power Amplifier Mode Diagnostic (D3 = 0); Line Driver Mode Diagnostic (D3 = 1) X Power amplifier working in standard mode (D1 = 0) Power amplifier working in high efficiency mode (D1 = 1) X
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If R/W = 1, the TDA7575PD sends 2 "Diagnostics Bytes" to P: DB1 and DB2. DB1
D7 D6 D5 D4 Thermal warming (if Tchip 150C, D7 = 1) Diag. cycle not activated or not terminated (D6 = 0) Diag. cycle terminated (D6 = 1) X Channel 1 Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) Channel 1 Normal load (D3 = 0) Short load (D3 = 1) Channel 1 Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Offset diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) Channel 1 No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel 1 No short to GND (D1 = 0) Short to GND (D1 = 1)
D3
D2
D1
D0
DB2
D7 D6 D5 D4 Offset detection not activated (D7 = 0) Offset detection activated (D7 = 1) X X Channel 2 Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) Channel 2 Normal load (D3 = 0) Short load (D3 = 1) Channel 2 Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Permanent diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) Channel 2 No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel 2 No short to GND (D1 = 0) Short to GND (D1 = 1)
D3
D2
D1
D0
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Examples of bytes sequence 1 - Turn-On diagnostic - Write operation
Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP
2 - Turn-On diagnostic - Read operation
Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK STOP
The delay from 1 to 2 can be selected by software, starting from T.B.D. ms 3a - Turn-On of the power amplifier with mute on, diagnostic defeat.
Start Address byte with D0 = 0 ACK IB1 X000XXXX ACK IB2 XXX1XX1X ACK STOP
3b - Turn-Off of the power amplifier
Start Address byte with D0 = 0 ACK IB1 X0XXXXXX ACK IB2 XXX0XXXX ACK STOP
4 - Offset detection procedure enable
Start Address byte with D0 = 0 ACK IB1 XX1XX1XX ACK IB2 XXX1XXXX ACK STOP
5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4).
Start

Address byte with D0 = 1
ACK
DB1
ACK
DB2
ACK
STOP
The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input capacitor with anomalous leackage current or humidity between pins. The delay from 4 to 5 can be selected by software, starting from T.B.D. ms
DIAGNOSTICS FUNCTIONAL DESCRIPTION: a) TURN-ON DIAGNOSTIC. It is activated at the turn-on (stand-by out) under I2C bus request. Detectable output faults are: - SHORT TO GND - SHORT TO Vs - SHORT ACROSS THE SPEAKER - OPEN SPEAKER To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (fig. A) is internally generated, sent through the speaker(s) and sunk back.The Turn On diagnostic status is internally stored until a successive diagnostic pulse is requested (after a I2C reading). If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse takes place first (power stage still in stand-by mode, low, outputs= high impedance).
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Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state is kept until a short appears at the outputs. Fig A: Turn - On diagnostic: working principle
Vs~5V Isource I (mA) Isource Isink
CH+ CHIsink
~100mS Measure time
t (ms)
Fig. B and C show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without TURN-ON DIAGNOSTIC. Fig B: SVR and Output behaviour CASE 1: without turn-on diagnostic
Vsvr Out
Permanent diagnostic acquisition time (100mS Typ)
Bias (power amp turn-on)
Diagnostic Enable (Permanent)
t FAULT event
Permanent Diagnostics data (output) permitted time Read Data
I2CB DATA
FIG. C: SVR and Output pin behaviour CASE 2: with turn-on diagnostic
Vsvr Out
Turn-on diagnostic acquisition time (100mS Typ) Permanent diagnostic acquisition time (100mS Typ)
t
Diagnostic Enable (Turn-on) Turn-on Diagnostics data (output) permitted time Diagnostic Enable (Permanent)
FAULT event
I2CB DATA
Bias (power amp turn-on) permitted time
Read Data
Permanent Diagnostics data (output) permitted time
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The information related to the outputs status is read and memorized at the end of the current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for SHORT TO GND / Vs the fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows:
S.C. to GND
x
Normal Operation
x
S.C. to Vs
0V
1.2V
1.8V
VS-1.5V
VS-0.9V
D02AU1341
VS
Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 26 dB to 12 dB gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The values in case of 26 dB gain are as follows:
S.C. across Load
x
Normal Operation
x
Open Load
0V
0.5
1.5
70
130
D01AU1254
Infinite
If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will change as follows:
S.C. across Load
x
Normal Operation
x
Open Load
0
1.5
4.5
200
400
D01AU1252
infinite
b) PERMANENT DIAGNOSTICS. Detectable conventional faults are: - SHORT TO GND - SHORT TO Vs - SHORT ACROSS THE SPEAKER The following additional features are provided: - OUTPUT OFFSET DETECTION The TDA7575PD has 2 operating statuses: 1) RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status is made every 1 ms (fig. G). Restart takes place when the overload is removed. 2) DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs . Once activated, the diagnostics procedure develops as follows (fig. H): - To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active. - Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started. - After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The
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relevant data are stored inside the device and can be read by the microprocessor. When one cycle has terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics throughout the car-radio operating time. - To check the status of the device a sampling system is needed. The timing is chosen at microprocessor level (over than half a second is recommended). Fig. G: Restart timing without Diagnostic Enable (Permanent) Each 1mS time, a sampling of the fault is done
Out
1-2mS 1mS 1mS 1mS 1mS
t
Overcurrent and short circuit protection intervention (i.e. short circuit to GND) Short circuit removed
Fig H: Restart timing with Diagnostic Enable (Permanent)
1mS
100mS
1mS
1mS
t
Overcurrent and short circuit protection intervention (i.e. short circuit to GND) Short circuit removed
OUTPUT DC OFFSET DETECTION. Any DC output offset exceeding +/- 2 V are signalled out. This inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the speakers at risk of overheating. This diagnostic has to be performed with low-level output AC signal (or Vin = 0). The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command): - START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1 - STOP = Actual reading operation Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process.
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MULTIPLE FAULTS. When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal, provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent). The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit with the 4 ohm speaker unconnected is considered as double fault. Double fault table for Turn On Diagnostic
S. GND (sc) S. GND (sc) S. GND (sk) S. Vs S. Across L. Open L. S. GND / / / / S. GND (sk) S. GND S. GND / / / S. Vs S. Vs + S. GND S. Vs S. Vs / / S. Across L. S. GND S. GND S. Vs S. Across L. / Open L. S. GND Open L. (*) S. Vs N.A. Open L. (*)
S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More precisely, in both the Channels SO = CH+, and SK = CH-. In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*) , which is not among the recognisable faults. Should an Open Load be present during the device's normal working, it would be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on). FAULTS AVAILABILITY All the results coming from I2Cbus, by read operations, are the consequence of measurements inside a defined period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic (Turn on and Permanent), for Offset Detector. To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset) will be reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd, then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to observe a change in Diagnostic bytes, two I2C reading operations are necessary. I2C PROGRAMMING/READING SEQUENCES A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection): - TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT - TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN) Car Radio Installation: DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults disappear). - OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I2C reading (repeat I2C reading until high-offset message disappears).
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mm TYP. inch TYP.
DIM. A A2 A4 A5 a1 b c D D1 D2 E E1 E2 E3 E4 e e3 G H h L N s
MIN. 3.25 3.1 0.8 0.030 0.22 0.23 15.8 9.4
MAX. 3.43 3.2 1 0.040 0.38 0.32 16 9.8
MIN. 0.128 0.122 0.031 0.0011 0.008 0.009 0.622 0.37
MAX. 0.135 0.126 0.039 0.0015 0.015 0.012 0.630 0.38
OUTLINE AND MECHANICAL DATA
0.2
0.008
1 13.9 10.9 5.8 2.9 0.65 11.05 0 15.5 0.8 0.075 0 15.9 0.61 1.1 1.1 0.031 10 (max) 8 (max) 14.5 11.1 2.9 6.2 3.2 0.547 0.429 0.228 0.114
0.039 0.57 0.437 0.114 0.244 1.259 0.026 0.435 0.003 0.625 0.043 0.043
(1) "D and E1" do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15mm (0.006") (2) No intrusion allowed inwards the leads.
PowerSO36 (SLUG UP)
7183931 C
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TDA7575PD
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